1. Field of the Invention
The present invention relates to a semiconductor memory device which includes a circuit including a semiconductor element such as a transistor.
2. Description of the Related Art
A dynamic random access memory (DRAM) is a semiconductor memory device where one bit of data can be stored with use of one transistor and one capacitor. The DRAM has advantages such as a small area per unit memory cell, easiness in integration for modularization, and low manufacturing cost.
Circuit patterns for DRAMs, like those for other semiconductor integrated circuits, have been miniaturized in accordance with the scaling law, and there was a time when it was considered difficult to achieve a design rule of 100 nm or less. One of the reasons is that in a transistor having a channel length of 100 nm or less, a leakage current caused by a punch-through phenomenon is likely to flow due to a short-channel effect and the transistor becomes incapable of functioning as a switching element, which has been considered to be a problem. In order to prevent a punch-through current, a silicon wafer may be doped with an impurity at high concentration. However, this is not an appropriate solution to the problem because it makes a junction leakage current likely to flow between a source and a substrate or between a drain and the substrate and eventually causes a deterioration of memory retention characteristics.
Against such a problem, a method has been considered for reducing the area occupied by one memory cell and also maintaining an effective channel length so as not to cause a short-channel effect by forming a transistor in the memory cell in accordance with a shape of a groove portion. One example is a structure in which a U-shaped vertically long groove portion is formed in a region where a channel portion of a transistor is formed, a gate insulating film is formed along a wall surface in the groove portion, and a gate electrode is formed so as to fill the groove (see Non-Patent Document 1).
A transistor having a channel portion of such a structure has a long effective channel length because a current flows between a source region and a drain region via an indirect route across the groove portion. Thus, an effect of reducing the area occupied by a transistor and suppressing a short-channel effect can be obtained.
In the DRAM, charge accumulated in the capacitor leaks due to off-state current of the transistor; therefore, there has been a need for recharging (refreshing) before necessary charge is lost.